Chapter 7: FET Biasing

In Chapter 4 we found that the biasing levels for a silicon transistor configuration can be obtained using the approximate characteristic equations VBE = 0.7 V, IC = IB, and IC IB. The link between input and output variables is provided by which is assumed to be fixed in magnitude for the analysis to be performed. The fact that beta is a constant establishes a linear relationship between IC and IB. Doubling the value of IB will double the level of IC and so on.



For the field-effect transistor, the relationship between input and output quantities is nonlinear due to the squared term in Shockley's equation. Linear relationships result in straight lines when plotted on a graph of one variable versus the other, whereas nonlinear functions result in curves as obtained for the transfer characteristics of a JFET. The nonlinear relationship between ID and VGS can complicate the mathematical approach to the dc analysis of FET configurations. A graphical approach may limit solutions to tenths-place accuracy, but it is a quicker method for most FET amplifiers. Since the graphical approach is in general the most popular, the analysis of this chapter will have a graphical orientation rather than use direct mathematical techniques.
Another distinct difference between the analysis of BJT and FET transistors is that:
The input controlling variable for a BJT transistor is a current level, whereas for the FET a voltage is the controlling variable.
In both cases, however, the controlled variable on the output side is a current level that also defines the important voltage levels of the output circuit.
The general relationships that can be applied to the dc analysis of all FET amplifiers are

(7.1)

and (7.2)

For JFETs and depletion-type MOSFETs and MESFETs, Shockley's equation is applied to relate the input and output quantities:

(7.3)

For enhancement-type MOSFETs and MESFETs, the following equation is applicable:

(7.4)

It is particularly important to realize that all of the equations above are for the device only! They do not change with each network configuration so long as the device is in the active region. The network simply defines the level of current and voltage associated with the operating point through its own set of equations. In reality, the dc solution of BJT and FET networks is the solution of simultaneous equations established by the device and the network. The solution can be determined using a mathematical or graphical approach—a fact to be demonstrated by the first few networks to be analyzed. However, as noted earlier, the graphical approach is the most popular for FET networks and is employed in this book.

The first few sections of this chapter are limited to JFETs and the graphical approach to analysis. The depletion-type MOSFET will then be examined with its increased range of operating points, followed by the enhancement-type MOSFET. Finally, problems of a design nature are investigated to fully test the concepts and procedures introduced in the chapter.

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