Instruction cycle; Each computer's CPU can have different cycles based on different instruction sets.
 

Each computer's CPU can have different cycles based on different instruction sets.

1. Fetch the instruction from main memory

The CPU presents the value of the program counter (PC) on the address bus. The CPU then fetches the instruction from main memory via the data bus into the memory data register (MDR). The value from the MDR is then placed into the current instruction register (CIR), a circuit that holds the instruction temporarily so that it can be decoded and executed.

2. Decode the instruction

The instruction decoder interprets and implements the instruction. The instruction register (IR) holds the current instruction, while the program counter (PC) holds the address in memory of the next instruction to be executed.

Fetch data from main memory

Read the effective address from main memory if the instruction has an indirect address. Fetch required data from main memory to be processed and placed into registers.

3. Execute the instruction

From the instruction register, the data forming the instruction is decoded by the control unit. It then passes the decoded information as a sequence of control signals to the relevant function units of the CPU to perform the actions required by the instruction such as reading values from registers, passing them to the Arithmetic logic unit (ALU) to add them together and writing the result back to a register. A condition signal is sent back to the control unit by the ALU if it is involved.

4. Store results

Also called write back to memory. The result generated by the operation is stored in the main memory, or sent to an output device. Based on the condition feedback from the ALU, the PC is either incremented to address the next instruction or updated to a different address where the next instruction will be fetched. The cycle is then repeated.